Photonic integrated circuits for AI optical interconnect.
Transmit and receive chips for pluggable modules and near-package optics, on one platform built for 200G per lane and 400G per lane. Compare the five parts below.
The parts at a glance
The table shows lane rates where the port type defines them. We send datasheet parameters on request.
DR8 TX chip
Available now- Function
- Transmitter
- Aggregate
- 1.6T
- Lane rate
- 200G
- Port type
- 1.6TBASE-DR8
- Placement
- Pluggable
FR4 TX chip
Available now- Function
- Transmitter
- Aggregate
- 800G
- Lane rate
- 200G
- Port type
- 800GBASE-FR4
- Placement
- Pluggable
DR8 RX chip
In development- Function
- Receiver
- Aggregate
- 1.6T
- Lane rate
- 200G
- Port type
- 1.6TBASE-DR8
- Placement
- Pluggable
FR8 RX chip
In development- Function
- Receiver
- Aggregate
- 1.6T
- Lane rate
- 200G
- Port type
- FR8
- Placement
- Pluggable
6.4T NPO TRx chip
In development- Function
- Transceiver
- Aggregate
- 6.4T
- Lane rate
- Not published
- Port type
- Open CPX MSA
- Placement
- Near-package
The parts in detail
Every port type below is an industry definition, not ours. The optical side follows the IEEE 802.3 physical-medium specs. They fix the wavelength plan, the lane count and the reach before any vendor draws a chip. The electrical side follows the OIF's 224G-per-lane interfaces, and the parts are designed for the OSFP module ecosystem and the Open CPX engine socket. Building to these definitions means each chip is made for the interfaces a standard module design already uses. The customer still qualifies the finished module in its own design. Reach figures such as 500 m and 2 km are the link classes the standards define, not separate claims for the chip.
For pluggable optics
Transmit and receive chips for front-panel modules, built to the port types the data hall already cables for.
DR8 TX chip
Transmitter · 1.6T
Request datasheetThe 1.6TBASE-DR8 port defined in IEEE 802.3dj: eight parallel single-mode fibers, one wavelength near 1311 nm, 200G PAM4 per lane, 500 m reach. The class that wires the inside of a data hall, to budgets the standard fixed before we drew anything.
DR81.6TBASE-DR8Available now
FR4 TX chip
Transmitter · 800G
Request datasheetThe 800GBASE-FR4 port defined in IEEE 802.3dj: four wavelengths on the CWDM grid, 1271 to 1331 nm, at 200G PAM4 per lane. All four share one duplex fiber pair. The 2 km class that connects halls to each other.
FR4800GBASE-FR4Available now
DR8 RX chip
Receiver · 1.6T
Discuss evaluationThe receive side of 1.6TBASE-DR8: eight parallel photodetector lanes, specified against the same standard link budget the transmitter is.
DR81.6TBASE-DR8In development
FR8 RX chip
Receiver · 1.6T
Discuss evaluationEight wavelengths on one duplex pair: the duplex-fiber answer at 1.6T, FR reach, no new cabling. The wavelength plan follows the module ecosystem as it standardizes this class, not a grid of our own.
FR8In development
For near-package optics
A single transceiver device for mounting beside the switch package, where the electrical channel to the ASIC is short enough to matter.
6.4T NPO TRx chip
Transceiver · 6.4T
Discuss evaluationTransmit and receive in one device, made to sit beside the switch package rather than in a front-panel cage.
Near-package opticsOpen CPX MSAIn development
The datasheet characterizes each part against its standard. It covers modulator bandwidth and Vπ, insertion loss, extinction ratio, and per-lane transmit power against the IEEE mask. It also covers receiver responsivity and sensitivity, power draw, operating temperature range and packaging. We send full datasheets on request and do not publish them here. Tell us the part you are evaluating and we will send the current revision.
The platform behind them
We make the photonic ICs. Everything around them is deliberately left open, so the same parts serve module makers and system designers who have already chosen their electronics.
Mature CMOS foundry
The photonics runs on an established CMOS process, not a bespoke line. A known process makes capacity and yield learning easier to plan than a new one would.
Mach-Zehnder modulation
Modulation is Mach-Zehnder rather than ring-based. An MZM uses more die area, but it is not resonant, so it needs no wavelength locking. It still needs a bias point held, which is slow, simple control. A ring modulator must track its resonance continuously as temperature changes.
200G and 400G per lane
We design the platform for both lane rates. The pluggable parts listed today run at 200G per lane, which their port types define. Parts at 400G per lane are not listed yet.
Evaluating one of these?
Tell us the port type, the lane rate and roughly when you need samples. If it is easier to start with the engineering question rather than the part number, that works too.